Economy of Firmware as a Service


Thanks to P4 language, FPGA programming becomes a service that can be handled by a third party.

The Cost of Flexibility in FPGA Programming

FPGA-based networking hardware, such as SmartNICs, offers unprecedented flexibility due to the direct structural programmability of the FPGA. Actually that's an understatement, FPGAs PROMISE flexibility and repeatedly keep delivering on that promise. But that flexibility is not very accessible to mere mortals, and by mere mortals we mean even mortals who are highly proficient in C or programming languages with higher level of abstraction. Only giants such as Microsoft can afford keeping a stellar team of FPGA developers to unleash the full potential of FPGAs, ranging from Bing search to deep learning accelerators. But the world of FPGA programming is not all no-can-do doom and gloom, there is a light at the end of the tunnel.

High Level Synthesis with P4

High level Synthesis (HLS) promises FPGA programmability in more “human” languages, such as, C/C++. Most HLS systems are either general (thus not optimized for any particular domain), or DSP-bound (optimized for audio/video signal processing). For the networking domain, the name of the game is P4.

This language is so high-level that it may be considered declarative, similar to SQL. It is easily understood by network engineers. P4 is also platform agnostic, so that it supports the write once-run many model. Replace your hardware with a new, faster one, even from a different vendor, and run the very same functions on it instantly. And repurpose the old hardware to play a different role in your infrastructure, effectively extending its lifetime. But first, compile your P4 to C and run it on x86 CPU to check that it behaves as expected.

Firmware as a Service

Netcope has unveiled Netcope P4 - the web portal, where users upload their P4 source codes, and get the complete FPGA firmware. Companies that want to make use of hardware acceleration have 3 options:

  1. They can spend lots of resources on internal FPGA HDL-proficient dev team, if they want to (and can afford it).

  2. They can use Netcope FPGA Boards without in-house FPGA firmware developers. Netcope FPGA team is dedicated to improving the P4 compiler and its underlying FPGA modules, so that all Netcope P4 users benefit from their work. The cost of FPGA development team is effectively shared. At the same time, the P4 code itself, which represents the device funcionality, remains the secret sauce of each Netcope P4 portal user. This means that vendors of networking devices can still compete with their features, even if they share the technology and cost of the underlying P4 to FPGA compiler. In our estimate, this option is more economically viable.

  3. They can keep internal team of FPGA developers, but focus their effort at other tasks, such as maintaining platform-dependent modules (in case of using custom hardware), or creating additional product-specific functionality beyond what P4 can describe (such as packet payload operations).

The old model of operation is as follows. Not nearly every company can afford to have a dedicated FPGA team:


FaaS offers more flexible and cost effective models:


Now the FPGA work in individual companies is reduced and focused to hardware-specific and product-specific tasks. The P4 can actually be a part of product specification - something that would have to be created anyway.


Overall, Netcope P4 service lowers the barriers for entering the market by reducing initial investments, thus it fosters progress and innovation. Compared to fixed-function hardware, the P4 language and Firmware as a Service offer much greater flexibility, extends hardware lifetime and streamlines hardware upgrades. Compared to in-house firmware development, the FaaS model reduces development cost by reducing/eliminating the need for FPGA dev team. It also reduces time to market, since writing P4 is so much faster than manual HDL coding for FPGAs.