INTEL® STRATIX® 10 FPGAs with Netcope P4

02/07/19

Netcope P4 compiles the packet processing program written in open-standard P4 language into 100 Gbps FPGA firmware, allowing unprecedented flexibility and rapid development of high-speed network application. Now the new possibilities have emerged with the Stratix 10 support.

Stratix_10_SX_Board_Side.pngWe’re pleased to announce that our Netcope P4 product now supports also Intel Stratix 10 FPGA targets. Netcope P4 compiles the packet processing program written in open-standard P4 language into 100 Gbps FPGA firmware, allowing unprecedented flexibility and rapid development of high-speed network application. Now the new possibilities have emerged with the Stratix 10 support. Being the high-end devices in Intel’s FPGA offering, Stratix 10 chips bring much more than just more logic cells, allowing to implement more complex functionality. Featuring the revolutionary Intel Hyperflex FPGA Architecture and built on the Intel 14 nm tri-gateprocess, Intel Stratix 10 devices deliver 2X core performance gains over previous-generation, high-performance FPGAs with up to 70% lower power.

Netcope P4 is specifically optimized to take advantage of the Stratix 10 advanced features, easily achieving over 100 Gbps packet processing throughput with low latency and resource utilization. Further improvements such as 3D stacked high-bandwidth memory 2 (HBM2) will bring even more freedom to network accelerator designers. With Netcope P4 and Stratix 10, your fully custom 100 Gbps packet processor is just hours away.

Viktor Puš, CTO of Netcope Technologies says:
Intel Stratix 10 FPGAs are now programmable in open-standard P4 language. Development of packet processing FPGA accelerators  was never easier. With Netcope P4, you can get fully custom 100 Gbps packet processing pipeline in hours. Using industry standard Avalon interfaces, integrating it into state of the art Intel Stratix 10 FPGAs is straightforward.