INVEA-TECH (now Netcope TEchnologies)in cooperation with CESNET demonstrated 100Gbps data transfers between FPGA chip and host memory over PCI Express bus. Such high throughput allows to build next-generation, flexible, cutting-edge solutions for computer networks with high-end performance.
INVEA-TECH in cooperation with CESNET has recently announced support of PCIe bifurcation technology that allows to transfer more than 100Gbps of data between FPGA chip and memory of host computer. This approach makes it possible to interconnect an FPGA chip with two PCI Express Gen x8 blocks through single PCI Express Gen 3 x16 interface. The concept has been applied in products of INVEA-TECH and enables sustained throughput of 100Gbps for data transfers between FPGA and host memory.
Petr Kastovsky, a director of FPGA department, comments on the topic: “The arrival of 100G Ethernet technology requires a new way of transferring the traffic to the host memory. As current FPGA chips contain PCI Express Gen 3 x8 blocks, the bifurcation is the right way to handle 100Gbps transfers between an FPGA and the host memory. We are proud to announce the sustainable throughput of 100Gbps of user data in our FPGA adapters that distinguishes our solutions from those of the competition.”
The advantage of using bifurcation technology is that it requires no additional external components like PCIe switch chip that increases power consumption, cost of components and makes the PCB design more complex. The concept of bifurcation introduced in Intel’s Core CPU has been overlooked by motherboards vendors for a long time but the situation has been changing.
During the demonstration, a series of tests was performed. The data was generated internally in FPGA chip to go beyond the limit of 100G Ethernet and the throughput of 107Gbps was achieved. The throughput is computed from the payload of transaction layer so that no overhead of PCIe is included. The demonstration showed the suitability of using PCIe bifurcation for high-speed data transfers between FPGA chip and host memory.
For more details see the full report.
CESNET, association of legal entities, was founded in 1996 by all universities of the Czech Republic and the Czech Academy of Sciences. Its main goals are operation and development of the Czech NREN, research and development of advanced network technologies and applications, broadening of the public knowledge about the advanced networking topics. CESNET is a long-time Czech academic network operator and participant of corresponding international projects.