Netcope Technologies released the second generation of TradeCOPE


Netcope Technologies has released a second generation of TradeCOPE – ultra-low latency FPGA solution for electronic trading.

This cutting edge technology enables customers to benefit from FPGA technology without the need of being a hardware expert. Market data processing and order entry is considered a commodity and provided as part of the complete solution. Users are responsible only for writing their trading strategies in C/C++ language, TradeCOPE takes care of the rest.

  • Completely redesigned blocks for market data processing – Effective market data processing is key for low-latency strategies. To further improve throughput and latency of our solution, we have completely redesigned these blocks to fully utilize the potential of the latest Xilinx Virtex-7 FPGA technology.

  • New supported protocols including NASDAQ ITCH5 and CME MDP 3.0 – We are constantly working on adding support of new exchanges and new protocols to help our customers expand their trading operations. Major additions include NASDAQ ITCH5 and CME MDP 3.0 data feeds. The former utilizes our Full Order Book processing block, which allows processing the whole ITCH5 feed using only two Netcope Technologies FPGA cards.

  • New and faster memories – Order book processing in the FPGA creates high demand for capacity, bandwidth and latency of the off-chip on-board memories. We have addressed this issue and reworked memory controllers that are now part of the TradeCOPE to increase supported memory capacity as well as memory bandwidth and latency. This effectively leads to double universe size and 10% boost in throughput and latency of the market data processing.

  • Sophisticated strategies within your reach – Fast on-chip memories are now available in the trading strategy written in C++. In addition to various user parameters set from software, it is now possible to use extra memory space to implement more sophisticated, stateful strategies in our FPGA solution. All this can still be done by a skilled software developer without previous experience in hardware design.