Meet Netcope at P4’s Developer Day & Workshop to learn more about In-band Network Telemetry on 100G.
Netcope Technologies will take part in the 3rd edition of P4’s Developer Day & Workshop. (16-17 May 2017, Stanford, CA) The two-day developer-focused event is organised by P4 Language Consortium and Stanford University. The event will provide the attendees with P4 tutorials, hands-on lab sessions and P4 related keynotes presented by industry representatives from companies such as VMware, Barefoot Networks, Bell Canada, Microsoft, and Google.
Netcope team has joined forces with network OEM company Flowmon Networks and CESNET (Czech NREN), the Czech developer and operator of national e-infrastructure for science, research, development and education and together they will present a live demo of 100G In-Band Network Telemetry with P4 to FPGA Compiler (NP4).
P4 is a high-level language for programming protocol-independent packet processing. It has been defined in order to enable easy programmability of network data plane processing agnostic to underlying technology, e.g. ASIC, CPU or FPGA. Netcope stands out with its ability to implement a P4 generated firmware into a high-speed FPGA-based network interface card, which in practice means that customers of Netcope are able to change the functionality of the network interface card on-demand, without the need of HDL coding.
To learn more about the In-Band Network Telemetry with NP4 demo, download our latest whitepaper here.