Netcope P4

P4 is a high-level language for programming protocol-independent packet processing. It was defined in order to enable easy programmability of network data plane processing agnostic to underlying technology, e.g. ASIC, CPU or FPGA. We present a new concept of Firmware as a Service that allows generation of FPGA firmware based on P4 description through a user-friendly web interface called Netcope P4. The process is totally transparent and automatic for the user.

Video presentation Download Netcope P4 product brief

Since designing in an HDL (hardware description language) is a non-trivial task not only from the point of view of expert hardware knowledge, but also because of complex development tools that are not easy to utilize, we took a different direction. We make the process of firmware generation totally transparent for our users and provide a web interface to input P4 sources and download firmware bitstreams. In other words, a user does not need to know HDL to program Netcope Smart NICs. The user puts in P4 code and sees if it checks out, and they have firmware with the desired functions in no time. 

Netcope P4 is an all-around efficient solution. Firmware architecture independent of HDL expertise reduces costs, automatic firmware generation saves time, and the total flexibility of Netcope accelerators protects future investments.

Read whitepapers:

Our online portal works as simply as any other online services like Gmail. After entering the user’s login credentials, a list of tasks with their statuses appears. A new task is created by uploading the user’s P4 source code. In the first phase, the user’s P4 source code is checked for correctness. If it does not pass this check, a description of the problem is provided and the user can fix his or her code. If everything goes well, the synthesis begins automatically. As it takes some time, the user is notified when the task is finished and they are ready to download and use their firmware. Happy P4’ing!

P4 to VHDL Compiler Continue to Netcope P4 portal


Features & Benefits

  • Programmable protocol stack

  • User-defined packet processing

  • No knowledge of HDL required

  • No synthesis tools or servers needed

  • Firmware as a Service

  • User-friendly online portal

  • Efficient P4 to VHDL compiler


Use Cases

  • Accelerated Network applications

    • ​Mobile Network Gateway (EPC/5GC)

    • Broadband Network Gateway (BNG/BRAS)

    • Segment routing (SRv6)

    • Virtual switch offload​

  • Network troubleshooting and fine-tuning

    • In-band Network Telemetry (INT)

    • In-situ Operations, Administration and Management (iOAM)

  • ​Network traffic preprocessing

    •  Encapsulation/decapsulation

    •  Tunnel termination

    •  Receive-Side Scaling (RSS)
    • ​ Load balancing

Firmware as a Service


Company A

Company A is a company without an FPGA team, but with at least one coder who can write code in P4.

  • The coder uploads the P4 code to the cloud-based part of the FaaS solution.

  • The P4 code is translated into VHDL and the firmware synthesis can now begin.

  • Once the synthesis is finished, the operator will receive a notification that they can now download Bitstream A.

The process of translation of P4 code into bitstream or netlist works fully autonomously. The Netcope team works here to add new features or to provide support to customers with special requirements.

Company B

Company B is a larger company with an internal FGPA team that can program FPGAs directly. However, in many cases it is still commercially viable to outsource the FPGA programming through FaaS.

  • The P4 coder uploads the P4 description that represents a component of the final firmware.

  • The same applies as in the case of Company A, only now the coder downloads Netlist B corresponding to the desired component to be used in the final firmware.

  • Company B's FPGA team can now put together Netlist B and their own HDL description of the final firmware. The synthesis can now begin in Company B's firmware lab.

Supported platforms

IntelⓇ FPGA PAC N3000
4 x 25G / 8 x 10G card by Intel. This SmartNIC features Arria 10 FPGA connected as a "bump in the wire".
2x100G card by Netcope. This datacenter-ready card offers guaranteed 200 Gbps packet processing.
Silicom FB2CGG3
2x100G card manufactured by Silicom. Ready for up to 2 QSFP28 transceivers.
Xilinx Netlist
Xilinx Netlist
Netlist for Xilinx Virtex-7, UltraScale and UltraScale+ FPGAs. To be integrated with the hardware platform of your ch...
Intel Netlist
Intel Netlist
Netlist for Intel Arria 10 and Stratix 10 FPGAs. To be integrated with the hardware platform of your choise.

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